Imec announced a cryogenic etching method that protects the surface of porous ultralow-k dielectrics against excessive plasma induced damages. As semiconductor technology scales below the 20nm node, the capacitance increases between nearby conductive portions of high-density integrated circuits, resulting in loss of speed and cross-talk of the device. To control the increase in capacitance in deeply-scaled devices, insulating layers of porous low-k dielectrics are integrated through plasma et...